03_BJT ampplifier basics

BJT amplifier
-basics
Currents in BJT
RC
n
+
IC
IB
+
VBB
RB
VBE=
0.6-0.7V
VCC
p
IE
n
-
VCE=
1-ECC
CE conection – Base bias
1
Input characteristic
IB[uA]
IB
VBE
VBE
0.6-0.7V


I B = I s  e ϕT − 1




U BE
Output characteristic
IC
IB
IC
VCE
IB=40µA
VBE
IE
IB=30µA
I E = IC + I B
IB=20µA
IB=10µA
I E ≈ IC
IB=0µA
I B << I C
VCE
BJT – the simplest model
(Ebers – Molle)
IB
B
C
VBE=0.7V
IC=βDCIB
E
2
Bias calculation – simle example
VBE = 0.65V
VBB = I B RB + VBE I B =
VBB − VBE 12 − 0.65
=
= 51.6 µA
RB
220k
I C = I B ⋅ β DC = 51.6 µA ⋅150 = 7.74mA
VCC = VCE + RC I C VCE = VCC − RC I C = 12 − 1k ⋅ 7.74mA = 4.26V
DC load line
IC
saturation
point
IC=
=4mA
cutoff
point
VCE
VCE=
=12V
Load line vs. VCC
IC
4mA
3mA
VCE
9V
12V
3
Load line vs. RC
IC
4mA
3mA
VCE
12V
Quiescent point line vs. VBB or RB
IC
4mA
RB=to small
-saturation
IC =
VBB − VBE
⋅ β DC
RB
RB=proper
-active region
VCE = VCC − RC I C
VCE
12V
RB=to big
-cutoff
cutoff – saturation (hard and soft)
BJT as a switch
RB=to small
or VBB high
-saturation
RB=to big
or VBB low
-cutoff
IC
ICsat=5mA
soft saturation
I
β DC ( sat ) = C > 10 ⇒ RB > 8.7 k
IB
hard saturation
β DC ( sat ) =
IC
< 10 ⇒ RB < 8.7 k
IB
10V
VCE
VCEsat=0---0.1V(100mA)—2V(2A)
4
CB connaction – Emitter bias
VBB = I E RE + VBE
VCC = VCE + RC I C + RE I E
VBE = 0.65V ; I C ≈ I E
IE =
VBB − VBE 5 − 0.65
=
= 5.3mA ≈ I C
RE
820
VCE = VCC − RC I C − RE I E ≈ VCC − (RC + RE )I C =
= 15 − (1k + 820 ) ⋅ 5.3mA = 5.35V
HINT:
Q-poit is
immune to
current gain β
Emitter bias vs. Base bias
Cutoff/sat
uration
Switching/
digital
βDC
100
250
100
250
IB
22µA
8.7µA
8.5µA
8.5µA
IC
2.17mA
2.17mA
0.85mA
2.13mA
VCE
6.3V
6.3V
13.3
10.7
mode
Active/linear
Cutoff/saturation
application
Controlled IC drivers/amp
Switching/digital
Small changes effect
IC
IB
VCE
←↑→↓
IB
IC
VCE
↑VBB
↑
↑
↓
↑VCC
-
-
↑
↑RC
-
-
↓
↑RB
↓
↓
↑
↑T(↓VBE)
↑
↑
↓
↑β
-
↑
↓
5
Small changes effect
IC
VC
IB
VCE
VE
←↑→↓
IB
IC
VE
VC
↑VBB
↑
↑
↑
↓
VCE
↓
↑VCC
-
-
-
↑
↑
↑RC
-
-
-
↓
↓
↑RE
↓
↓
-
↑
↑
↑T(↓VBE)
↑
↑
↑
↓
↓
↑β
-
-
-
-
-
VDB – Voltage Divider Bias
mixed (potentiometric) biasing
VCC
RC
RB1
RC
VCC
RB
VBB
RE
RB2
RE
V BB = VCC
Thevenin theorem >>>>>>>>>
RB 2
R B1 + R B 2
R B = R B 1 || R B 2
Potentiometric biasing
VBB = I B RB + I E RE + VBE
VCC = VCE + RC I C + RE I E
VBE = 0.65V ; I C ≈ I E ; I C = β DC I B
IE =
VBB − VBE
RB
RE +
≈ IC
β DC
VCE = VCC − RC I C − RE I E ≈ VCC − (RC + RE )I C
6
Potentiometric biasing
- an example
VCC=12V
V BB = VCC
RC=2k
RB1=20k
R B = R B1 || R B 2 = 6 .66 k
βDC=100
RB2=10k
RB 2
= 4V
R B1 + R B 2
VBE = 0.65V ; I C ≈ I E ; I C = β DC I B
RE=2k
I E ≈ IC =
VBB − VBE
R
RE + B
= 1.62mA
β DC
VCE = VCC − RC I C − RE I E ≈ VCC − (RC + RE )I C = 5.5V
Small changes effect
VCC
RC
RB1
IB
VB
IC
VCE
RB2
VC
RE
VE
IB
IC
VB
VE
VC
VCE
↑VCC
↑
↑
↑
↑
↑↓
↑↓
↑RC
-
-
-
-
↓
↓
↑RE
↓
↓
-
-
↑
↑
↑RB1
↓
↓
↓
↓
↑
↑
↑RB2
↑
↑
↑
↑
↓
↓
↑T(↓VBE)
↑
↑
↓
↑
↓
↓
↑β
↑
↑
↑
↑
↓
↓
V − VBE
I E = BB
R + RB
←↑→↓
≈ IC
β DC
E
VCE = VCC − RC I C − RE I E ≈ VCC − (RC + RE )I C
Stiff/Firm voltage divider
I E ≈ IC =
VBB − VBE
R
RE + B
β DC
Emitter bias:
βDC independent
I E ≈ IC =
Base bias:
I E ≈ IC =
VBB − VBE
RE
RE > 100 RB
β DC
Firm devider:
Stiff devider:
β DC
RE > 10
RB
VBB − VBE
RB
β DC
7
Two supply emitter bias
VCC>0
RC
VEE = I B RB + I E RE + VBE
VCC − VEE = VCE + RC I C + RE I E
RB
RE
VEE<0
VBE = 0.65V ; I C ≈ I E ; I C = β DC I B
I E ≈ IC =
VEE − VBE
R
RE + B
β DC
VCE ≈ (VCC − VEE ) − (RC + RE )I C
Collector feedback bias
VCC
RC
RB
VCC = VBE + I B RB + I C RC
VCC ≈ VCE + RC I C
VBE = 0.65V ; I C ≈ I E ; I C = β DC I B
I E ≈ IC =
VCC − VBE
R + RB
β DC
C
VCE ≈ VCC − RC I C
Collector- Emitter feedback bias
VCC
RC
VCC = I B RB + I C RC + I E RE + VBE
VCC ≈ VCE + RC I C + RE I E
RB
RE
VBE = 0.65V ; I C ≈ I E ; I C = β DC I B
I E ≈ IC =
VCC − VBE
RE + RC + RB
VCE ≈ VCC − (RC + RE )I C
β DC
8
Q – point stabilization
Higher – better temp stabillization
I E ≈ IC =
(V ) − VBE

R +  RB

 β DC 
Smaller (in comp. with R) – better β stabillization
βAC(B), βDC vs. Q-point
Load line
VCC
IC
RB1
RC
VCC
RE + RC
RB2
saturation
point
RE
cutoff
point
VCE
VCC
9
Correct Q-point
IC
IC
IWYm+
Q
ICQ
IWYm-
UCEQ
UCEsat
EC
UWYm+
UCE
UCE
t
UWYmIWYm+ = IWYmUWYm+ = UWYm-
t
INCorrect Q-point
IcQ to high
IC
IC
IWYm+
Q1
ICQ1
I WYm-
UCEsat
UCEQ1
EC
UWYm+
UCE
UCE
t
UWYmIWYm+ < IWYmUWYm+ > UWYm-
t
INCorrect Q-point
IcQ to low
IC
IC
IWYm+
Q2
ICQ2
IWYmUCEQ2
UCEsat
UWYm+
EC
UCE
UCE
t
UWYmIWYm+ > IWYmUWYm+ < UWYm-
t
10
Q – point analysis
-Multisim
Q – point analysis
results
Q - point vs. application
Application
IC(Q)
VCE(Q) [V]
Low noise l.f. amps
20-200 [uA]
1-5
Small to medium signal l.f. & h.f. amps
0.2-2 [mA]
3-10
High input impedance amps (op amps)
0.1-10 [uA]
0.7-5
Broadband h.f. amps; low noise h.f
5-50 [mA]
5-10
Midium power l.f. amps
0.1 -10 [A]
5-15
High power l.f. amps
2-10 [A]
20-200
2-10 [A]
20-1200
(clas A is not popular)
high power h.f. & special amps
(not common – clas C is most popular)
11
Summary
• Ebers- Moll simplified model
• Bias calculation
–
–
–
–
base current
emiter current
voltage divider
collectore feedback
• Load line calculation
• Q-point vs. application
Problems
• Draw and describe simplfied BJT model.
• What is the DC load line ?
• Estimate saturation point and cut-off for
given circuit (known parameters: RC, RE,
VCC).
• Estimate Q-point for given schematic
diagram (known parameters: RB1,RB2, RC,
RE, UBEQ, VCC, β).
12