Description of learning outcomes for module

Module name:
Projektowanie systemów cyfrowych przy pomocy języków wysokiego
poziomu ESL
Academic year:
Faculty of:
2012/2013
IES-2-209-SM-s
ECTS credits:
3
Computer Science, Electronics and Telecommunications
Field of study:
Study level:
Code:
Electronics and
Telecommunication
Second-cycle studies
Lecture language:
English
Specialty: Sensors and
Microsystems
Form and type of study:
Profile of education:
Full-time studies
Academic (A)
Semester:
2
Course homepage:
Responsible teacher:
Russek Paweł ([email protected])
Academic teachers: dr inż. Dąbrowska-Boruch Agnieszka ([email protected])
Wielgosz Maciej ([email protected])
Description of learning outcomes for module
MLO code
Student after module completion has the
knowledge/ knows how to/is able to
Connections
with FLO
Method of learning
outcomes verification (form
of completion)
M_U001
Student is able to create a detailed documentation
of a system that is designed using high level
description language.
ES2A_U03
Project
M_U002
Student is able to use ESL description language in
orser to create an electronics device that fits given
constraints.
ES2A_U08
Project
M_U003
On his own, student is able to propose
enhancemants to a given project according to given
constraints.
ES2A_U17
Project
M_W001
Student has an extended knowledge of digital
system design. New capabilities regard high level
synthesis based design.
ES2A_W04
Project
M_W002
Student understands Electronic System Level (ESL)
design and description methods.
ES2A_W05
Project
Skills
Knowledge
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Module card - Projektowanie systemów cyfrowych przy pomocy języków wysokiego poziomu ESL
M_W003
Student knows development trends of Electronic
Design Automation (EDA) tools.
ES2A_W11
FLO matrix in relation to forms of classes
Seminar
classes
Practical
classes
Fieldwork
classes
-
-
+
-
-
-
-
-
-
-
-
M_U002
Student is able to use ESL
description language in orser
to create an electronics
device that fits given
constraints.
-
-
+
-
-
-
-
-
-
-
-
M_U003
On his own, student is able to
propose enhancemants to a
given project according to
given constraints.
-
-
+
-
-
-
-
-
-
-
-
M_W001
Student has an extended
knowledge of digital system
design. New capabilities
regard high level synthesis
based design.
+
-
-
-
-
-
-
-
-
-
-
M_W002
Student understands
Electronic System Level (ESL)
design and description
methods.
+
-
-
-
-
-
-
-
-
-
-
M_W003
Student knows development
trends of Electronic Design
Automation (EDA) tools.
+
-
-
-
-
-
-
-
-
-
-
E-learning
Conversation
seminar
Student is able to create a
detailed documentation of a
system that is designed using
high level description
language.
Others
Project
classes
M_U001
Workshops
Laboratory
classes
Form of classes
Auditorium
classes
Student after module
completion has the
knowledge/ knows how to/is
able to
Lectures
MLO code
Skills
Knowledge
Module content
Lectures
The goal of the course is to make students familiar with state-of-the-art methods those
are use in a design process of digital systems.
Methods that are presented are based on Electronic System Level (ESL) description
languages. In the most cases, ESL languages resemble in their syntax Ansi C
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Module card - Projektowanie systemów cyfrowych przy pomocy języków wysokiego poziomu ESL
language.
In oposite to the most common design process that is based on Hardware Description
Languages (HDL), such like VHDL or Verilog. ESL description is a behavioral system
descripton.
ESL approach allows to significantly shorten design process time. It also sllows to
design an electronic system in a modular way.
Laboratory classes
The laboratory work os based on Impulse-C Co-Developer development platform.
Impuls-C language allows for description of electronic digital modules in Ansi C like
language. It also allows to integrate Impuls-C modules with VHDL and Verilog modules.
Hardware-Software paradigm is exploited in a design process. Software part that is
described in C/C++, can be use in a simulation or in a run-time process.
Laboratory course covers tutorials and students’ projects.
Students’ practical designs can be implemented and run on FPGA reconfigurable
platform. DRC-reconfigurable computer can be accessed by the students for the
benefit of their projects. DRC platform is a dual socket computer that integrates FPGA
Virtex 5 LX200 an AMD Athlon processor on a single motherboard.
The Co-Developer license is provided by Impuls-C Accelerated Technology as a part of
AGH University partnership. Impulse-C Accelerated Technolgy is also happy to
cooperate with students in their projects development.
Method of calculating the final grade
Final grade is an average of lecture grade and laboratory grade:
final grade = 0.5 laboratory grade + 0.5 lecture grade
Prerequisites and additional requirements
Prerequisites and additional requirements not specified
Recommended literature and teaching resources
Recommended literature and teaching resources not specified
Scientific publications of module course instructors related to the topic of
the module
Additional scientific publications not specified
Additional information
None
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Module card - Projektowanie systemów cyfrowych przy pomocy języków wysokiego poziomu ESL
Student workload (ECTS credits balance)
Student activity form
Student workload
Preparation for classes
5h
Contact hours
5h
Completion of a project
20 h
Participation in lectures
15 h
Participation in laboratory classes
30 h
Summary student workload
75 h
Module ECTS credits
3 ECTS
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